1. Field of the Invention
The present invention relates to a test structure of a semiconductor device, and more particularly, to a test structure of a semiconductor device with improved test reliability.
2. Description of the Related Art
As semiconductor devices continue to be highly integrated, the sheet resistance and contact resistance of the gate electrodes and source/drain regions of the MOS transistors increase, thereby increasing the resistance-capacitance delay time of the electrical signal that is applied to the gate electrodes of metal oxide semiconductor (MOS) transistors.
Accordingly, to produce high-performance MOS transistors suitable for highly integrated semiconductor devices, a silicide layer is formed on a gate electrode and a source/drain region of a MOS transistor. The silicide layer is usually formed by a self-aligned silicide (salicide) process. However, the silicide layer that is formed on the source/drain region passes through the source/drain region and penetrates down to a semiconductor substrate or a well on a lower part of the source/drain region, thereby resulting in a junction breakdown. This is referred to as silicide spike. In a case where the silicide spike occurs, a junction leakage current is drastically increased. Further, the occurrence of the silicide spike degrades electrical characteristics and reliability of the MOS transistors.
Accordingly, it would be desirable to have a test structure of a semiconductor device that is capable of determining whether silicide spike of silicide has occurred after performing a silicide formation process.